A wide variety of memory devices can be used to maintain and store data and instructions for various computers and similar systems. In particular, non-volatile memory (e.g., flash memory) is a type of electronic memory media that can be rewritten and that can retain content without consumption of power. Unlike dynamic random access memory (DRAM) devices and static random memory (SRAM) devices in which a single byte can be erased, flash memory devices are typically erased in fixed multi-bit blocks or sectors. Flash memory technology can include NOR flash memory and/or NAND flash memory, for example. NOR flash memory evolved from electrically erasable read only memory (EEPROM) chip technology, in which, unlike flash memory, a single byte can be erased; and NAND flash memory evolved from DRAM technology. Flash memory devices typically are less expensive and denser as compared to many other memory devices, meaning that flash memory devices can store more data per unit area.
Flash memory has become popular, at least in part, because it combines the advantages of the high density and low cost of EPROM with the electrical erasability of EEPROM. Flash memory is nonvolatile; it can be rewritten and can hold its content without power. The physical structure is more robust against shock than volatile memory and has gained popularity in portable devices. It can be used in many portable electronic products, such as cell phones, portable computers, voice recorders, thumbnail drives and the like, as well as in many larger electronic systems, such as cars, planes, industrial control systems, etc. The fact that flash memory can be rewritten, as well as its retention of data without a power source, small size, and light weight, have all combined to make memory devices, that utilize in part flash memory, a useful and popular means for transporting and maintaining data.
Typically, data can be stored in a physical memory location (e.g., physical block address (PBA)) in a memory device (which can be among a plurality of memory devices in a system). A logical block address (LBA) can be associated with the data and its corresponding PBA to facilitate retrieval of the data from the memory by a host. When the host requests data from or desires to write data to a particular LBA, the PBA in the appropriate memory device can be accessed through a translation process of the provided LBA. This translation process conventionally can be in the form of, for example, an address translation table or translation lookaside buffer (e.g., cache dedicated to address translations) that can be used to store translations of LBAs and PBAs. The table can be maintained in the host or in the individual memory device. However, the translation process (e.g., search process) of locating a page within a block can be time consuming, which can result in delaying a read of the memory, for the page locations are typically not stored within the table and a search of the pages within the memory can be performed to find the requested information.
In a system involving data storage in non-volatile memory systems, it can be desired to maintain LBA to PBA translation information. As data can be relocated physically in a memory device (or in the case of a multi-device system, between memory devices), a means to link the LBA and the appropriate corresponding PBA can be undertaken. Any such means can involve a unique combination of a specified number of translation attributes. Determination of these translation attributes can be achieved in part with the information associated with the LBA, which is in a known location of the non-volatile memory system(s). The attributes can include, for example, 1) which device has the data (in multi-device systems); 2) which erase block in the device has the data, 3) which page in the erase block has the data, and 4) which data block in the page has the data. Procedures to determine the attributes and obtain the LBA to PBA translation can be provided through a search process, a calculation process and/or a table look-up process, for example. It is desirable to improve the efficiency (e.g., speed) of performing LBA-PBA translations to reduce the amount of time to perform operations associated with the memory.